/[VMELinux]/driver/ca91c042.h
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Contents of /driver/ca91c042.h

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Revision 1.6 - (show annotations)
Fri Apr 5 19:31:07 2002 UTC (17 years, 3 months ago) by jhuggins
Branch: MAIN
CVS Tags: license_change
Changes since 1.5: +82 -40 lines
File MIME type: text/plain
Error occurred while calculating annotation data.
Changed the license from GPL to a version of the Apache Software License.
1 /* ====================================================================
2 * The VMELinux Software License, Version 1.1
3 * (Based on the Apache Software License 1.1)
4 *
5 * Copyright (c) 1997-2002 John Huggins, Michael Wyrick
6 * and the VMELinux Project.
7 * All rights reserved.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 *
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 *
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in
18 * the documentation and/or other materials provided with the
19 * distribution.
20 *
21 * 3. The end-user documentation included with the redistribution,
22 * if any, must include the following acknowledgment:
23 * "This product includes software developed by the
24 * VMELinux Project (http://www.vmelinux.org/)."
25 * Alternately, this acknowledgment may appear in the software itself,
26 * if and wherever such third-party acknowledgments normally appear.
27 *
28 * 4. The names "VMELinux" and "VMELinux Project" must
29 * not be used to endorse or promote products derived from this
30 * software without prior written permission. For written
31 * permission, please contact info@VMELinux.org.
32 *
33 * 5. Products derived from this software may not be called "VMELinux",
34 * nor may "VMELinux" appear in their name, without prior written
35 * permission of the VMELinux Project.
36 *
37 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESSED OR IMPLIED
38 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
39 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
40 * DISCLAIMED. IN NO EVENT SHALL THE VMELINUX PROJECT OR
41 * ITS CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
42 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
43 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
44 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
45 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
46 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
47 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
48 * SUCH DAMAGE.
49 * ====================================================================
50 *
51 * This software consists of voluntary contributions made by many
52 * individuals on behalf of the VMELinux Project. For more
53 * information on the VMELinux Project, please see
54 * <http://www.vmelinux.org/>.
55 *
56 */
57
58 //------------------------------------------------------------------------------
59 // Title: Tundra Universe PCI-VME Kernel Driver
60 // Initial programmer: Michael Wyrick
61 // $Date: 2002/04/05 19:31:07 $
62 // $Author: jhuggins $
63 // $Revision: 1.6 $
64 //------------------------------------------------------------------------------
65 // Purpose: Provide a Kernel Driver to Linux for the Universe I and II
66 // Universe model number ca91c042
67 // Docs:
68 // This driver supports:
69 // Universe
70 // Universe II
71 // Universe II B
72 // Universe II D
73 //-----------------------------------------------------------------------------
74 #ifndef _ca91c042_H
75 #define _ca91c042_H
76
77 //-----------------------------------------------------------------------------
78 // Public Functions
79 //-----------------------------------------------------------------------------
80 // This is the typedef for a VmeIrqHandler
81 typedef void (*TirqHandler)(int vmeirq, int vector, void *dev_id, struct pt_regs *regs);
82 // This is the typedef for a DMA Transfer Callback function
83 typedef void (*TDMAcallback)(int status);
84
85 // Returns the PCI baseaddress of the Universe chip
86 char* Universe_BaseAddr(void);
87 // Returns the PCI IRQ That the universe is using
88 int Universe_IRQ(void);
89
90 char* mapvme(unsigned int pci, unsigned int vme, unsigned int size,
91 int image,int ctl);
92 void unmapvme(char *ptr, int image);
93
94 // Interrupt Stuff
95 void enable_vmeirq(unsigned int irq);
96 void disable_vmeirq(unsigned int irq);
97 int request_vmeirq(unsigned int irq, TirqHandler);
98 void free_vmeirq(unsigned int irq);
99
100 // DMA Stuff
101 void VME_DMA(void* pci, void* vme, unsigned int count, int ctl, TDMAcallback cback);
102 void VME_DMA_LinkedList(void* CmdPacketList,TDMAcallback cback);
103
104 // Misc
105 int VME_Bus_Error(void);
106
107 //-----------------------------------------------------------------------------
108 //
109 //-----------------------------------------------------------------------------
110 #define IRQ_VOWN 0x0001
111 #define IRQ_VIRQ1 0x0002
112 #define IRQ_VIRQ2 0x0004
113 #define IRQ_VIRQ3 0x0008
114 #define IRQ_VIRQ4 0x0010
115 #define IRQ_VIRQ5 0x0020
116 #define IRQ_VIRQ6 0x0040
117 #define IRQ_VIRQ7 0x0080
118 #define IRQ_DMA 0x0100
119 #define IRQ_LERR 0x0200
120 #define IRQ_VERR 0x0400
121 #define IRQ_res 0x0800
122 #define IRQ_IACK 0x1000
123 #define IRQ_SWINT 0x2000
124 #define IRQ_SYSFAIL 0x4000
125 #define IRQ_ACFAIL 0x8000
126
127 //-----------------------------------------------------------------------------
128 //
129 //-----------------------------------------------------------------------------
130 // See Page 2-77 in the Universe User Manual
131 typedef struct
132 {
133 unsigned int dctl; // DMA Control
134 unsigned int dtbc; // Transfer Byte Count
135 unsigned int dlv; // PCI Address
136 unsigned int res1; // Reserved
137 unsigned int dva; // Vme Address
138 unsigned int res2; // Reserved
139 unsigned int dcpp; // Pointer to Numed Cmd Packet with rPN
140 unsigned int res3; // Reserved
141 } TDMA_Cmd_Packet;
142
143 //-----------------------------------------------------------------------------
144 // Below here is normaly not used by a user module
145 //-----------------------------------------------------------------------------
146 #define DMATIMEOUT 2*HZ;
147
148 // Define for the Universe
149 #define SEEK_SET 0
150 #define SEEK_CUR 1
151
152 #define CONFIG_REG_SPACE 0xA0000000
153
154 #define PCI_SIZE_8 0x0001
155 #define PCI_SIZE_16 0x0002
156 #define PCI_SIZE_32 0x0003
157
158 #define IOCTL_SET_CTL 0xF001
159 #define IOCTL_SET_BS 0xF002
160 #define IOCTL_SET_BD 0xF003
161 #define IOCTL_SET_TO 0xF004
162 #define IOCTL_PCI_SIZE 0xF005
163 #define IOCTL_SET_MODE 0xF006
164 #define IOCTL_SET_WINT 0xF007 // Wait for interrupt before read
165
166 #define PCI_ID 0x0000
167 #define PCI_CSR 0x0004
168 #define PCI_CLASS 0x0008
169 #define PCI_MISC0 0x000C
170 #define PCI_BS 0x0010
171 #define PCI_MISC1 0x003C
172
173 #define LSI0_CTL 0x0100
174 #define LSI0_BS 0x0104
175 #define LSI0_BD 0x0108
176 #define LSI0_TO 0x010C
177
178 #define LSI1_CTL 0x0114
179 #define LSI1_BS 0x0118
180 #define LSI1_BD 0x011C
181 #define LSI1_TO 0x0120
182
183 #define LSI2_CTL 0x0128
184 #define LSI2_BS 0x012C
185 #define LSI2_BD 0x0130
186 #define LSI2_TO 0x0134
187
188 #define LSI3_CTL 0x013C
189 #define LSI3_BS 0x0140
190 #define LSI3_BD 0x0144
191 #define LSI3_TO 0x0148
192
193 #define LSI4_CTL 0x01A0
194 #define LSI4_BS 0x01A4
195 #define LSI4_BD 0x01A8
196 #define LSI4_TO 0x01AC
197
198 #define LSI5_CTL 0x01B4
199 #define LSI5_BS 0x01B8
200 #define LSI5_BD 0x01BC
201 #define LSI5_TO 0x01C0
202
203 #define LSI6_CTL 0x01C8
204 #define LSI6_BS 0x01CC
205 #define LSI6_BD 0x01D0
206 #define LSI6_TO 0x01D4
207
208 #define LSI7_CTL 0x01DC
209 #define LSI7_BS 0x01E0
210 #define LSI7_BD 0x01E4
211 #define LSI7_TO 0x01E8
212
213 #define SCYC_CTL 0x0170
214 #define SCYC_ADDR 0x0174
215 #define SCYC_EN 0x0178
216 #define SCYC_CMP 0x017C
217 #define SCYC_SWP 0x0180
218 #define LMISC 0x0184
219 #define SLSI 0x0188
220 #define L_CMDERR 0x018C
221 #define LAERR 0x0190
222
223 #define DCTL 0x0200
224 #define DTBC 0x0204
225 #define DLA 0x0208
226 #define DVA 0x0210
227 #define DCPP 0x0218
228 #define DGCS 0x0220
229 #define D_LLUE 0x0224
230
231 #define LINT_EN 0x0300
232 #define LINT_STAT 0x0304
233 #define LINT_MAP0 0x0308
234 #define LINT_MAP1 0x030C
235 #define VINT_EN 0x0310
236 #define VINT_STAT 0x0314
237 #define VINT_MAP0 0x0318
238 #define VINT_MAP1 0x031C
239 #define STATID 0x0320
240 #define V1_STATID 0x0324
241 #define V2_STATID 0x0328
242 #define V3_STATID 0x032C
243 #define V4_STATID 0x0330
244 #define V5_STATID 0x0334
245 #define V6_STATID 0x0338
246 #define V7_STATID 0x033C
247
248 #define MAST_CTL 0x0400
249 #define MISC_CTL 0x0404
250 #define MISC_STAT 0x0408
251 #define USER_AM 0x040C
252 #define U2SPEC 0x04FC
253
254 #define VSI0_CTL 0x0F00
255 #define VSI0_BS 0x0F04
256 #define VSI0_BD 0x0F08
257 #define VSI0_TO 0x0F0C
258
259 #define VSI1_CTL 0x0F14
260 #define VSI1_BS 0x0F18
261 #define VSI1_BD 0x0F1C
262 #define VSI1_TO 0x0F20
263
264 #define VSI2_CTL 0x0F28
265 #define VSI2_BS 0x0F2C
266 #define VSI2_BD 0x0F30
267 #define VSI2_TO 0x0F34
268
269 #define VSI3_CTL 0x0F3C
270 #define VSI3_BS 0x0F40
271 #define VSI3_BD 0x0F44
272 #define VSI3_TO 0x0F48
273
274 #define VRAI_CTL 0x0F70
275 #define VRAI_BS 0x0F74
276 #define VCSR_CTL 0x0F80
277 #define VCSR_TO 0x0F84
278 #define V_AMERR 0x0F88
279 #define VAERR 0x0F8C
280
281 #define VSI4_CTL 0x0F90
282 #define VSI4_BS 0x0F94
283 #define VSI4_BD 0x0F98
284 #define VSI4_TO 0x0F9C
285
286 #define VSI5_CTL 0x0FA4
287 #define VSI5_BS 0x0FA8
288 #define VSI5_BD 0x0FAC
289 #define VSI5_TO 0x0FB0
290
291 #define VSI6_CTL 0x0FB8
292 #define VSI6_BS 0x0FBC
293 #define VSI6_BD 0x0FC0
294 #define VSI6_TO 0x0FC4
295
296 #define VSI7_CTL 0x0FCC
297 #define VSI7_BS 0x0FD0
298 #define VSI7_BD 0x0FD4
299 #define VSI7_TO 0x0FD8
300
301 #define VCSR_CLR 0x0FF4
302 #define VCSR_SET 0x0FF8
303 #define VCSR_BS 0x0FFC
304
305
306 // DMA General Control/Status Register DGCS (0x220)
307 // 32-24 || GO | STOPR | HALTR | 0 || CHAIN | 0 | 0 | 0 ||
308 // 23-16 || VON || VOFF ||
309 // 15-08 || ACT | STOP | HALT | 0 || DONE | LERR | VERR | P_ERR ||
310 // 07-00 || 0 | INT_S | INT_H | 0 || I_DNE | I_LER | I_VER | I_PER ||
311
312 // VON - Length Per DMA VMEBus Transfer
313 // 0000 = None
314 // 0001 = 256 Bytes
315 // 0010 = 512
316 // 0011 = 1024
317 // 0100 = 2048
318 // 0101 = 4096
319 // 0110 = 8192
320 // 0111 = 16384
321
322 // VOFF - wait between DMA tenures
323 // 0000 = 0 us
324 // 0001 = 16
325 // 0010 = 32
326 // 0011 = 64
327 // 0100 = 128
328 // 0101 = 256
329 // 0110 = 512
330 // 0111 = 1024
331
332 #endif

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