/[VMELinux]/driver/ca91c042.h
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Contents of /driver/ca91c042.h

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Revision 1.1.1.1 - (show annotations) (vendor branch)
Fri Jun 15 20:45:25 2001 UTC (18 years, 1 month ago) by astro
Branch: VMELinux
CVS Tags: vmelinux-1_1_1, start
Changes since 1.1: +0 -0 lines
File MIME type: text/plain
Error occurred while calculating annotation data.
Initial install of VMELinux into CVS
1 //-----------------------------------------------------------------------------
2 // Copyright 1999, Transmitter Location Systems, LLC.
3 //-----------------------------------------------------------------------------
4 // Project : TLS-2000
5 // Title :
6 // Designer :
7 // Platform :
8 // Language :
9 //
10 //-----------------------------------------------------------------------------
11 // Purpose :
12 // Docs :
13 //-----------------------------------------------------------------------------
14 // RCS:
15 // $Id: ca91c042.h,v 1.1.1.1 2001/06/15 20:45:25 astro Exp $
16 // $Log: ca91c042.h,v $
17 // Revision 1.1.1.1 2001/06/15 20:45:25 astro
18 // Initial install of VMELinux into CVS
19 //
20 // Revision 1.7 1999/11/09 14:47:39 wyrick
21 // New DMA Linked List Mode
22 //
23 // Revision 1.6 1999/11/08 18:28:42 wyrick
24 // DMARead Works in Blocking Form
25 //
26 // Revision 1.5 1999/10/08 13:10:18 root
27 // *** empty log message ***
28 //
29 // Revision 1.4 1999/08/06 14:19:55 wyrick
30 // temp
31 //
32 // Revision 1.3 1999/08/05 19:54:03 wyrick
33 // New Style of Interrupts implemented for user Modules
34 //
35 //-----------------------------------------------------------------------------
36 #ifndef _ca91c042_H
37 #define _ca91c042_H
38
39 //-----------------------------------------------------------------------------
40 // Public Functions
41 //-----------------------------------------------------------------------------
42 // This is the typedef for a VmeIrqHandler
43 typedef void (*TirqHandler)(int vmeirq, int vector, void *dev_id, struct pt_regs *regs);
44 // This is the typedef for a DMA Transfer Callback function
45 typedef void (*TDMAcallback)(int status);
46
47 // Returns the PCI baseaddress of the Universe chip
48 char* Universe_BaseAddr(void);
49 // Returns the PCI IRQ That the universe is using
50 int Universe_IRQ(void);
51
52 char* mapvme(unsigned int pci, unsigned int vme, unsigned int size,
53 int image,int ctl);
54 void unmapvme(char *ptr, int image);
55
56 // Interrupt Stuff
57 void enable_vmeirq(unsigned int irq);
58 void disable_vmeirq(unsigned int irq);
59 int request_vmeirq(unsigned int irq, TirqHandler);
60 void free_vmeirq(unsigned int irq);
61
62 // DMA Stuff
63 void VME_DMA(void* pci, void* vme, unsigned int count, int ctl, TDMAcallback cback);
64 void VME_DMA_LinkedList(void* CmdPacketList,TDMAcallback cback);
65
66 //-----------------------------------------------------------------------------
67 //
68 //-----------------------------------------------------------------------------
69 #define IRQ_VOWN 0x0001
70 #define IRQ_VIRQ1 0x0002
71 #define IRQ_VIRQ2 0x0004
72 #define IRQ_VIRQ3 0x0008
73 #define IRQ_VIRQ4 0x0010
74 #define IRQ_VIRQ5 0x0020
75 #define IRQ_VIRQ6 0x0040
76 #define IRQ_VIRQ7 0x0080
77 #define IRQ_DMA 0x0100
78 #define IRQ_LERR 0x0200
79 #define IRQ_VERR 0x0400
80 #define IRQ_res 0x0800
81 #define IRQ_IACK 0x1000
82 #define IRQ_SWINT 0x2000
83 #define IRQ_SYSFAIL 0x4000
84 #define IRQ_ACFAIL 0x8000
85
86 //-----------------------------------------------------------------------------
87 //
88 //-----------------------------------------------------------------------------
89 // See Page 2-77 in the Universe User Manual
90 typedef struct {
91 unsigned int dctl; // DMA Control
92 unsigned int dtbc; // Transfer Byte Count
93 unsigned int dlv; // PCI Address
94 unsigned int res1; // Reserved
95 unsigned int dva; // Vme Address
96 unsigned int res2; // Reserved
97 unsigned int dcpp; // Pointer to Numed Cmd Packet with rPN
98 unsigned int res3; // Reserved
99 } TDMA_Cmd_Packet;
100
101 //-----------------------------------------------------------------------------
102 // Below here is normaly not used by a user module
103 //-----------------------------------------------------------------------------
104 #define DMATIMEOUT 2*HZ;
105
106 // Define for the Universe
107 #define SEEK_SET 0
108 #define SEEK_CUR 1
109
110 #define CONFIG_REG_SPACE 0xA0000000
111
112 #define PCI_SIZE_8 0x0001
113 #define PCI_SIZE_16 0x0002
114 #define PCI_SIZE_32 0x0003
115
116 #define IOCTL_SET_CTL 0xF001
117 #define IOCTL_SET_BS 0xF002
118 #define IOCTL_SET_BD 0xF003
119 #define IOCTL_SET_TO 0xF004
120 #define IOCTL_PCI_SIZE 0xF005
121 #define IOCTL_SET_MODE 0xF006
122 #define IOCTL_SET_WINT 0xF007 // Wait for interrupt before read
123
124 #define PCI_ID 0x0000
125 #define PCI_CSR 0x0004
126 #define PCI_CLASS 0x0008
127 #define PCI_MISC0 0x000C
128 #define PCI_BS 0x0010
129 #define PCI_MISC1 0x003C
130
131 #define LSI0_CTL 0x0100
132 #define LSI0_BS 0x0104
133 #define LSI0_BD 0x0108
134 #define LSI0_TO 0x010C
135
136 #define LSI1_CTL 0x0114
137 #define LSI1_BS 0x0118
138 #define LSI1_BD 0x011C
139 #define LSI1_TO 0x0120
140
141 #define LSI2_CTL 0x0128
142 #define LSI2_BS 0x012C
143 #define LSI2_BD 0x0130
144 #define LSI2_TO 0x0134
145
146 #define LSI3_CTL 0x013C
147 #define LSI3_BS 0x0140
148 #define LSI3_BD 0x0144
149 #define LSI3_TO 0x0148
150
151 #define SCYC_CTL 0x0170
152 #define SCYC_ADDR 0x0174
153 #define SCYC_EN 0x0178
154 #define SCYC_CMP 0x017C
155 #define SCYC_SWP 0x0180
156 #define LMISC 0x0184
157 #define SLSI 0x0188
158 #define L_CMDERR 0x018C
159 #define LAERR 0x0190
160
161 #define DCTL 0x0200
162 #define DTBC 0x0204
163 #define DLA 0x0208
164 #define DVA 0x0210
165 #define DCPP 0x0218
166 #define DGCS 0x0220
167 #define D_LLUE 0x0224
168
169 #define LINT_EN 0x0300
170 #define LINT_STAT 0x0304
171 #define LINT_MAP0 0x0308
172 #define LINT_MAP1 0x030C
173 #define VINT_EN 0x0310
174 #define VINT_STAT 0x0314
175 #define VINT_MAP0 0x0318
176 #define VINT_MAP1 0x031C
177 #define STATID 0x0320
178 #define V1_STATID 0x0324
179 #define V2_STATID 0x0328
180 #define V3_STATID 0x032C
181 #define V4_STATID 0x0330
182 #define V5_STATID 0x0334
183 #define V6_STATID 0x0338
184 #define V7_STATID 0x033C
185
186 #define MAST_CTL 0x0400
187 #define MISC_CTL 0x0404
188 #define MISC_STAT 0x0408
189 #define USER_AM 0x040C
190
191 #define VSI0_CTL 0x0F00
192 #define VSI0_BS 0x0F04
193 #define VSI0_BD 0x0F08
194 #define VSI0_TO 0x0F0C
195
196 #define VSI1_CTL 0x0F14
197 #define VSI1_BS 0x0F18
198 #define VSI1_BD 0x0F1C
199 #define VSI1_TO 0x0F20
200
201 #define VSI2_CTL 0x0F28
202 #define VSI2_BS 0x0F2C
203 #define VSI2_BD 0x0F30
204 #define VSI2_TO 0x0F34
205
206 #define VSI3_CTL 0x0F3C
207 #define VSI3_BS 0x0F40
208 #define VSI3_BD 0x0F44
209 #define VSI3_TO 0x0F48
210
211 #define VRAI_CTL 0x0F70
212 #define VRAI_BS 0x0F74
213 #define VCSR_CTL 0x0F80
214 #define VCSR_TO 0x0F84
215 #define V_AMERR 0x0F88
216 #define VAERR 0x0F8C
217
218 #define VCSR_CLR 0x0FF4
219 #define VCSR_SET 0x0FF8
220 #define VCSR_BS 0x0FFC
221
222
223 // DMA General Control/Status Register DGCS (0x220)
224 // 32-24 || GO | STOPR | HALTR | 0 || CHAIN | 0 | 0 | 0 ||
225 // 23-16 || VON || VOFF ||
226 // 15-08 || ACT | STOP | HALT | 0 || DONE | LERR | VERR | P_ERR ||
227 // 07-00 || 0 | INT_S | INT_H | 0 || I_DNE | I_LER | I_VER | I_PER ||
228
229 // VON - Length Per DMA VMEBus Transfer
230 // 0000 = None
231 // 0001 = 256 Bytes
232 // 0010 = 512
233 // 0011 = 1024
234 // 0100 = 2048
235 // 0101 = 4096
236 // 0110 = 8192
237 // 0111 = 16384
238
239 // VOFF - wait between DMA tenures
240 // 0000 = 0 us
241 // 0001 = 16
242 // 0010 = 32
243 // 0011 = 64
244 // 0100 = 128
245 // 0101 = 256
246 // 0110 = 512
247 // 0111 = 1024
248
249 #endif

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